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Bit adc with programmable Gin Production

The module integrates the MCP3432 A/D converter chip. The module can provide an analog input function for Raspberry Pi and provide high-accuracy analo
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Bit adc with programmable Gin Production

Introduction Bit adc with programmable Gin Production

The module integrates the MCP3432 A/D converter chip. The module can provide an analog input function for Raspberry Pi and provide high-accuracy analog input for Arduino.

MCP3424 was one of the low noise and high accuracy 18-bit delta-sigma analog-to-digital (ΔΣ A/D) converter family members of the MCP342X series. It is characteristics are: Self-calibration of the internal offset and gain per each conversion.

Users could select the PGA gain before the analog-to-digital conversion takes place. This allows the device to convert a most weak input signal with high resolution.

Specifications:

  1. Operating Voltage : 2.7 - 5.5V
  2. Standy Current :300nA (5V)
  3. Operating Temperature : -40°C ~ +125°C
  4. On-Board Voltage Reference : 2.048V ± 0.05%, Drift 15 PPM /°C
  5. On-Board Programmable Gain Amplifier (PGA) : x1,x2,x4,x8
  6. Differential Input Full Scale Range :-2.048V / PGA ~ 2.048V / PGA (e.g., PGA=4, Range is -0.512 ~ 0.512V)
  7. Programmable Resolution :12, 14, 16, 18bits Programmable Data Rate: 240, 60, 15, 3.75 SPS
  8. Gain Error :0.05% (PGA = 1, 18bits)
Bit adc with programmable Gin Production

Circuit Operation:

The overall ADC architecture is illustrated in Figure 1, consisting of an input PGA, sampling switches, capacitor array, SAR logic, comparator, and RV-Buffer. The supply voltages of the input PGA and SAR ADC core were both 1.2 V. The positive and negative reference voltages of the capacitor array are 1.1 V and 0.1 V, respectively, which are generated by the RV-Buffer with a 2.5 V supply voltage. The input PGA could be provided by a 0–18 dB programmable gain with 3 dB steps. The working process of the proposed ADC is divided into two parts, sampling and the conversion. The sampling period accounts for 1/4 of one clock period, and the remaining time is allocated to conversion. During the sampling period, the input signal of the SAR ADC is amplified to 1.8 Vpp, diff by controlling the gain of the PGA according to the different amplitudes of the input signal. The output of the common-mode voltage of the PGA and the input common-mode voltage of the SAR- ADC are both( 0.6 v).

This SAR ADC employs the top plate sampling topology in which the sampling front-end is connected to the comparator inputs, so the comparator starts to perform the first-bit decision steps after the sampling phase is finished. Therefore, an (N−1) bit CDAC can meet the quantization requirements for an N-bit SAR ADC, which can save half of the capacitors [9,10]. During the data and conversion phase, the comparison result of the comparator was used to control the flip direction of the bottom plate for the capacitor array. This SAR ADC adopts asynchronous logic control [11], shown in Figure 2, that the clock of the comparator was generated by the comparison result at the previous moment.

bit adc with programmable gain circuit operation

There are 2-critical signal paths in the circuit. One is the path from the output of the comparator for the next time the CKC goes high, which is path 1. The second path was from the output of the comparator to the flipping of the bottom plate of the CDAC, which is path tow. It is critical to ensure the signal of the top plate of the CDAC has been established before the succeeding comparison period, so a delay block was inserted into path 1. The capacitor array employs a 4-bit (least-significant bits (LSB)) + 7-bit (most-significant bits (MSB)) split structure, and one redundant bit [12,13] is added to high and low bits, respectively, to form a 14-bit (D13-D0) digital output code. After this arrangement, the total capacitance of a single end is 129 Cu, while Cu is the unit capacitance. A custom-designed unit capacitor is implemented to improve the matching property, and its capacitance is about 6.5 fF, resulting in a total single-ended capacitance of about 0.84 pF.

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How the Bit adc with programmable Gin Production Work:

What do the circuits look like for 12-bit, analog-to-digital converter (ADC) systems? These systems can be found in handheld meters, data loggers, automotive systems, and monitoring systems, to name a few. If these circuits produce 4,096 possible digital outputs to the microcontroller and processor, what happens between the system input and the output?

When they accomplished this level of digital output resolution, in the circuit it was possible to use a 12- or 16-bit SAR or a 24-bit delta-sigma ADC. The systems we should consider in this article and the next three (ADC Basics, Parts 9, 10, and 11) each have the multiplexer, gain cell and converter. In the four cases we will consider, these functions can appear in the analog or digital domain. Regardless, all four systems can solve the defined application space requirements. The power to all systems is a single, 5V supply voltage. Each system was capable of producing gain changes from 1 to 128, and each system had an input multiplexer.

A four-system matrix In our first system, a 10-channel, programmable gain amplifier (PGA) teams up with a discrete multiplexer and a 12-bit SAR-ADC. For this circuit, of the PGA provides analog gains for 1 to 128. In our second system, we will use a multiplexed 12-bit SAR-ADC that allows the insertion of a PGA between its multiplexer and ADC function. Once again, the circuit's programmable-gain-amplifier provides analog gains from 1 to 128. Our third system used to top the same programmable gain amplifier for a 16-bit SAR-ADC. This SAR-ADC provides a digital gain of up to 16, and the PGA provides an analog gain from 1 to 128. We will only be using the lower gains of 1, 2, and 4. This fourth system uses a 24-bit delta-sigma data converter to provide of the multiplexing capability and the system process gain within one chip.

Frequently Asked Questions

What is the gain in ADS1115?

Additionally, the ADS1115 has a Programmable Gain Amplifier (PGA) that can help you measure voltages in different ranges, these are 6.144 (measures up to 6.144V) 4.096 (measures up to 4.096V) 2.048 (measures up to the 2.048V) 1.024 (measures up to the 1.024V.

What is the difference between ADS1015 and ADS1115?

The ADS1115 has been data format for 16-bit data. The ADS1015 has been a format for 12-bit ADC data over 16 bits, where the lowest four LSB are 0s. However, the firmware could be for conversions based on LSb size.

What type of ADC is ADS1115?

Description. A Breakout Board from ADS1115 16-Bit ADC - 4 Channel with Programmable Gain Amplifier. The ADS1115 provides 16-bit precision /3300 samples/second over I2-C. The chip could be configured as 4 single-ended input channels and two differential channels.

What is the resolution of ADS1115 ADC?

For microcontrollers without an analog-to-digital converter and when you want a higher-precision ADC, the ADS1115 provides 16-bit precision at 860 samples/second over I2-C. The chip could be configured as 4 single-ended input channels or two differential channels.

What is the output of ADS1115?

The block outputs the converted digital data of the analog channel. For the ADS1015 converter, the digital output values are in the range 0 to 4095 while, for the ADS1115 converter, the digital output values are in the range 0 to 65535.

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